docs(formal-verification): keccak z3/QF-BV gate — the verification baseline - #923
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docs(formal-verification): keccak z3/QF-BV gate — the verification baseline#923MauroToscano wants to merge 6 commits into
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…seline Add a standalone, reusable template for machine-checking chip round-wiring with z3 in the quantifier-free bitvector theory (QF-BV). The worked instance verifies one Keccak-f[1600] round as shipped on main (#889's inlined θ/ρ shift identities); the README is written as a generic oracle+checker method to be copied for the next chip. Verification only — no constraint or performance change. python/z3, no cargo. Board (regenerated, par.log): - positive control (non-vacuity): PASS — constraints uniquely pin output - negative controls: all SAT (caught) — theta_no_rot, rho_swap, chi_no_not, chi_swap, iota_no_rc, plus tamper_test's iota_wrong_rc, rho_off_by_one, drop_chi_xor_byte, drop_hwsl_carry (changed + removed constraints) - main check: all 24 round indices UNSAT - reference anchored to hashlib SHA3 + repo constants; concrete mirror matches FIPS-202 over random/structured inputs Files: z3_verify.py (gate), keccak_ref.py (independent FIPS-202 reference), model_dataflow.py + test_dataflow.py (concrete mirror), z3_parallel.py (runner), tamper_test.py (controls), test_ref.py (reference tests), README.md (methodology + width audit + scope), par.log (captured board).
…al_verification/ thoughts/ is not a real home in this repo. The z3/QF-BV gates live under formal_verification/<chip>/, one directory per verified chip, so the next gates (blake3, sha2, the sponge) land beside this one.
The daily loc report only counts Rust, so the formal-verification harnesses (python/z3 today, possibly Lean or SMT later) were invisible. Count formal_verification/ per gate directory across all languages tokei recognizes and report it as its own section — excluded from the total and the crates walk — in the json/slack/github/shell outputs.
par.log was a captured board that nothing regenerates or checks, so it is a claim about a run nobody repeats. Its verdict is already stated in the README's expected-board section, and the gate prints the same summary on every run. No script reads or writes it; the two README references are updated.
This was referenced Aug 13, 2026
…-range contract (#934) z3py's comparison operators on bitvectors are signed (bvsle), so the ByteAlu operand contract was written as a signed compare. Switch it to ULE. Behaviour-preserving at the widths in use: both call sites feed sums of at most two zero-extended bytes at width 16, so the sign bit is unreachable and the two encodings are the same formula on the reachable domain. The board is unchanged (24/24 UNSAT, 5/5 negative controls SAT). The fix is prophylactic, for the next chip that copies this contract. Also removes dead code: a redundant in_lanes comprehension whose value was overwritten two lines later, and an unused register initialiser in keccak_ref.
…alsification gap
The runbook omitted tamper_test.py, so the documented path ran no
removed-constraint control at all; add it and say why it is not optional.
The sibling-verifications section claimed a keccak-sponge gate that exists in
no ref. Cite only the BLAKE3 gate, by branch, since it is unmerged.
The ByteAlu contract listed a nonexistent ADD op and omitted OR; the real row
set is {XOR, AND, OR}, of which keccak_rnd uses XOR and AND.
The KeccakRc contract said nothing about the committed padding rows 24..31
(rc = 0), which it does not cover and which the gate assumes unreachable.
keccak_rnd.rs is byte-identical across main, this branch and 6a28012 (blob
51b7759), so that claim stands. The rs:NNN citations were correct against the
pre-#889 revision d83b4d9 and were invalidated by #889; two of them cite
BusId::Hwsl senders that #889 deleted outright, so the old note's 'the
referenced constructs are unchanged' was false.
Finally, record that a constraint encoded as a variable's sort cannot be
falsified by any negative control: AreBytes and the theta-carry IS_BIT are
load-bearing in the circuit but unremovable from the model, so deleting them
from the Rust would leave this gate green.
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What this is
A standalone, reusable template for machine-checking that a bit/byte hash
chip's per-round transition wiring computes the function it claims, using z3 in
the quantifier-free bitvector theory (QF-BV). It lands the keccak
round-wiring verification under a clean, chip-agnostic home
(
formal_verification/keccak/— one directory per verified chip, so the nextgates land beside it) and rewrites the README as a generic method the next chip
gate should copy.
Verification code only — no constraint or performance change. python/z3, no
cargo. The z3 gate previously lived bundled inside an open perf PR
(
feat/keccak-hwsl-inline); this extracts the core round-wiring verifier as abaseline, off
main, without any perf change.Line counting
tooling/loc(the daily report) only counts Rust, so these harnesses wereinvisible to it. The report now counts
formal_verification/as its ownstandalone section (per gate directory, all languages tokei recognizes —
python today, possibly Lean/SMT later), excluded from the
lambda_vm (total)and crates numbers:
The method (reusable)
f(FIPS-202 here, anchored to
hashlibSHA3 + repo constants), a column-rolemap, and a typed chip-contract library (
ByteAluXOR/AND/ADD,AreBytes0..256 range, the halfword-shift decomposition, word recomposition,
KeccakRc).interaction / eval constraint an equation under its contract; assert
output ≠ reference(input)and ask for a counterexample. UNSAT ⇒ correctgiven the contracts; SAT ⇒ under-constrained, with a forging witness.
negative controls (injected bug must flip to SAT, else UNSAT is
meaningless), a positive control (non-vacuity), the width audit (every
field-lifted byte/word width must cite a real range-check contract + a
non-overflow side condition, or a field-level attacker escapes the bitvector
model), and the rule that fail-open is the only dangerous failure mode.
Which round variant it verifies
The shipped round on
mainas of #889 (perf(keccak): inline θ/ρ halfword shifts as μ-gated identities, commit6a280121). On main the θ/ρ shifts areinline μ-gated linear identities
μ·(in·2^rnc − right·2¹⁶ − left)=0withrange-checked byte-pair halves; the QF-BV model encodes each shift as the unique
(left, right)decomposition those identities force, so the gate is faithful tothe inlined round. Verified: main's
keccak_rnd.rsis byte-identical to thebranch the model was authored against — the wiring transcribed is the wiring
shipped. (One documented follow-up: QF-BV cannot test that the range bounds are
sufficient mod
pfor the inline identities — that companion integer-mod-pcheck ships with the perf PR and is the first extension of this template.)
Verified board (regenerated,
par.log)theta_no_rot,rho_swap,chi_no_not,chi_swap,iota_no_rciota_wrong_rc,rho_off_by_one,drop_chi_xor_byte,drop_hwsl_carry(forged witnesses exhibited for the removed-constraint cases)
hashlibSHA3 + repoKECCAK_RC/KECCAK_RHO; concretemirror matches FIPS-202 over 200 random rounds + 20 full permutations +
structured inputs
Scope
QF-BV covers bit/byte hashes (Keccak/SHA-3, SHA-2, BLAKE3). Native-field chips
(Poseidon/Poseidon2) are out of scope — their round is field arithmetic and needs
a finite-field solver (
cvc5FF) or a proof assistant (Lean). The check is oneround's transition given the helper-chip contracts; it does not re-verify the
helper chips. The BLAKE3 chip gate and the keccak-sponge verification already
follow this method — this directory is the canonical template.
Running it