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1. eth_10G_switch_fabric eth_10G_switch_fabric Public

   QoS-aware 10G Ethernet switch fabric optimized for FPGA deployment

   SystemVerilog 1

2. SDN_mininet SDN_mininet Public

   This is a repository for SDN-based implementation of MPLS network with OVS and OpenFlow, and Network Virtualization using OpenDayLight controller for remote approaches

   Python 2 1

3. LAN_ZYNQ LAN_ZYNQ Public

   Launching a UDP&TCP server in a LAN network using ZYNQ-7020 Processing System(PS)

   C 3

4. Multicycle_RISCV Multicycle_RISCV Public

   Implementation of a multi-cycle RISC-V processor for executing a RISC-V assembly code

   Verilog 5

5. clock_recovery clock_recovery Public

   FPGA implementation of a CDR core using Asynchronous FIFO with MMCM Dynamic Phase Shift

   Verilog

6. VowelVC VowelVC Public

   VowelVC: A Neural Vowel-Centric Voice Conversion Framework with Incremental Memory Learning for Few-Shot Speaker Adaptation

   Python