Hardware Prefetch Tuning for E-Cores#41
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| Prefetches can be scrubbed by throttlers prior to being accepted. These throttlers are designed to reduce a combined high prefetch level within the module as well as reducing the prefetch requests when the Uncore memory subsystem is at a high load. | ||
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| <div id="figure-1" style="display:flex; flex-direction: column;justify-content: center; align-items: center; margin: 20px auto"> |
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Likely broken image link -
For images, please create an images folder, add the image and link it, similar to these recipes-
https://github.com/intel/optimization-zone/tree/main/software/kafka/images
https://github.com/intel/optimization-zone/tree/main/software/mysql-postgresql/images
In the main readme , can link it using relative path
rsiyer-intel
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rsiyer-intel
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Please review and fix these -
Typos -
Prefetecher → Prefetcher
hardware/HWPrefetchTuning/README.md:145
LCC Streamer → LLC Streamer
hardware/HWPrefetchTuning/README.md:187
This even counts → This event counts
hardware/HWPrefetchTuning/README.md:346
on figurable → probably configurable
hardware/HWPrefetchTuning/README.md:388
There are two types if enable bits → probably There are two types of enable bits
hardware/HWPrefetchTuning/README.md:251
Likely formatting / numbering / anchor mistakes
TOC item missing period:
1.3.4 [L2 Next Line Prefetch (L2 NLP)] should probably be 1.3.4. ...
hardware/HWPrefetchTuning/README.md:39
Update references to Section 0 to appropriate Section 4.4
hardware/HWPrefetchTuning/README.md:193
hardware/HWPrefetchTuning/README.md:264 (broken link)
hardware/HWPrefetchTuning/README.md:268
hardware/HWPrefetchTuning/README.md:284
Heading level inconsistency:
4.5 MSR 0x1323 should likely be ## 4.5 MSR 0x1323
hardware/HWPrefetchTuning/README.md:532
Support tag typo in table:
GR → probably GRT
hardware/HWPrefetchTuning/README.md:538
Likely wording/grammar issues:
Unless otherwise stated features are forward to later generations.
likely meant something like Unless otherwise stated, features are carried forward to later generations.
hardware/HWPrefetchTuning/README.md:120
The CORE_TYPE set to 0x20...
likely missing "is"
hardware/HWPrefetchTuning/README.md:121
Setting the disable freezes...
likely Setting this bit disables... or Setting the disable bit freezes...
hardware/HWPrefetchTuning/README.md:296
increased and decrease in performance
likely increases and decreases in performance
hardware/HWPrefetchTuning/README.md:300
Possible terminology inconsistencies
DCU Next Page Prefetcher (L1 NLP) seems inconsistent; should probably be L1 NPP
hardware/HWPrefetchTuning/README.md:235
Demand throttler (DPT) looks inconsistent with earlier Demand Throttling of Prefetches (DTP)
hardware/HWPrefetchTuning/README.md:246
harp-intel
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harp-intel
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Valuable content. Thanks for submitting. A few items noted.
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repo convention is to put images in 'images' subdirectory. Please create subdirectory and move this image into it. Update any links.
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As this content is specific to E-core prefetchers, directory should be renamed, e.g., ecorePrefetchTuning.
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Link to this document should be added to root README.md TOC.
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| # 3 PERFORMANCE MONITORS | ||
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| Performance monitoring events in the Intel® E-core are relevant to hardware prefetch tuning as they allow for tracking of increased and decrease in performance as well as execution behavior changes. See the respective device manual for details. Performance events are also available at [perfmon-events.intel.com](perfmon-events.intel.com). Core events can either be specified through the event/umask combination or by using PMU tools such as Intel® vTune™ or Perf in Linux. For example, the following Linux command can be used to measure cycles, instructions and cycles spent on the oldest load for core 0 during 1 seconds: |
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Link to external site needs protocol (https://) otherwise interpreted as relative link.
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