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Subcircuit Files for 9 IC's by Ahasas Yadav #596

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Subcircuit Files for 9 IC's by Ahasas Yadav #596

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87fd998
CD4016
Ahasas101 Jul 11, 2026
9b244a7
CD4026B
Ahasas101 Jul 11, 2026
20e7ec3
CD4029B
Ahasas101 Jul 11, 2026
6019f74
CD4089B
Ahasas101 Jul 11, 2026
6bf9c22
CD4099B
Ahasas101 Jul 11, 2026
48a3dac
L298N
Ahasas101 Jul 11, 2026
21949a0
LM3914
Ahasas101 Jul 11, 2026
e762180
MM74C923
Ahasas101 Jul 11, 2026
a3621c6
SN54170
Ahasas101 Jul 11, 2026
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27 changes: 27 additions & 0 deletions library/SubcircuitLibrary/CD4016/CD4016.cir
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.title KiCad schematic
R6 Gnd SIGD_IN 1000k
U1 SIGA_IN SIGA_OUT SIGB_IN SIGB_OUT B C Gnd SIGC_IN SIGC_OUT SIGD_OUT SIGD_IN D A vdd PORT
R8 Gnd SIGD_OUT 1000k
M15 SIGD_OUT Net-_M11-Pad1_ SIGD_IN vdd eSim_MOS_P
M16 SIGD_OUT D SIGD_IN Gnd eSim_MOS_N
M11 Net-_M11-Pad1_ D Gnd Gnd eSim_MOS_N
M12 Net-_M11-Pad1_ D vdd vdd eSim_MOS_P
M9 Net-_M10-Pad1_ B Gnd Gnd eSim_MOS_N
M10 Net-_M10-Pad1_ B vdd vdd eSim_MOS_P
R5 Gnd SIGB_IN 1000k
M13 SIGB_OUT Net-_M10-Pad1_ SIGB_IN vdd eSim_MOS_P
M14 SIGB_OUT B SIGB_IN Gnd eSim_MOS_N
R7 Gnd SIGB_OUT 1000k
R3 Gnd SIGA_OUT 1000k
M6 SIGC_OUT Net-_M3-Pad1_ SIGC_IN vdd eSim_MOS_P
R4 Gnd SIGC_OUT 1000k
R2 Gnd SIGC_IN 1000k
M8 SIGC_OUT C SIGC_IN Gnd eSim_MOS_N
M4 Net-_M3-Pad1_ C vdd vdd eSim_MOS_P
M2 Net-_M1-Pad1_ A vdd vdd eSim_MOS_P
M7 SIGA_OUT A SIGA_IN Gnd eSim_MOS_N
M5 SIGA_OUT Net-_M1-Pad1_ SIGA_IN vdd eSim_MOS_P
M3 Net-_M3-Pad1_ C Gnd Gnd eSim_MOS_N
M1 Net-_M1-Pad1_ A Gnd Gnd eSim_MOS_N
R1 Gnd SIGA_IN 1000k
.end
38 changes: 38 additions & 0 deletions library/SubcircuitLibrary/CD4016/CD4016.cir.out
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.title kicad schematic

.include PMOS-180nm.lib
.include NMOS-180nm.lib
r6 gnd sigd_in 1000k
* u1 siga_in siga_out sigb_in sigb_out b c gnd sigc_in sigc_out sigd_out sigd_in d a vdd port
r8 gnd sigd_out 1000k
m15 sigd_out net-_m11-pad1_ sigd_in vdd CMOSP W=100u L=0.18u M=1
m16 sigd_out d sigd_in gnd CMOSN W=100u L=0.18u M=1
m11 net-_m11-pad1_ d gnd gnd CMOSN W=0.36u L=0.18u M=1
m12 net-_m11-pad1_ d vdd vdd CMOSP W=0.72u L=0.18u M=1
m9 net-_m10-pad1_ b gnd gnd CMOSN W=0.36u L=0.18u M=1
m10 net-_m10-pad1_ b vdd vdd CMOSP W=0.72u L=0.18u M=1
r5 gnd sigb_in 1000k
m13 sigb_out net-_m10-pad1_ sigb_in vdd CMOSP W=100u L=0.18u M=1
m14 sigb_out b sigb_in gnd CMOSN W=100u L=0.18u M=1
r7 gnd sigb_out 1000k
r3 gnd siga_out 1000k
m6 sigc_out net-_m3-pad1_ sigc_in vdd CMOSP W=100u L=0.18u M=1
r4 gnd sigc_out 1000k
r2 gnd sigc_in 1000k
m8 sigc_out c sigc_in gnd CMOSN W=100u L=0.18u M=1
m4 net-_m3-pad1_ c vdd vdd CMOSP W=100u L=0.18u M=1
m2 net-_m1-pad1_ a vdd vdd CMOSP W=0.72u L=0.18u M=1
m7 siga_out a siga_in gnd CMOSN W=100u L=0.18u M=1
m5 siga_out net-_m1-pad1_ siga_in vdd CMOSP W=100u L=0.18u M=1
m3 net-_m3-pad1_ c gnd gnd CMOSN W=100u L=0.18u M=1
m1 net-_m1-pad1_ a gnd gnd CMOSN W=0.36u L=0.18u M=1
r1 gnd siga_in 1000k
.tran 0e-00 0e-00 0e-00

* Control Statements
.control
run
print allv > plot_data_v.txt
print alli > plot_data_i.txt
.endc
.end
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